Jt 1.png



Ho Chi Minh City

Junior / Middle / Senior



  • Able to work with a culturally diverse tech team that designs, develops and optimizes FPGA solutions for automated trading systems

  • Possess good communication skills; apart from communicating within team members, the incumbent has to work with traders to define requirements and come up with innovative, efficient and smart trading solutions

  • Possess good technical skills and experience in FPGA development. Industry experience is ideal but not a prerequisite.

  • Embraces learning and innovation; research on new technologies and new hardware platforms


Offered Salary

$ 100 - $ 200



  • A good Bachelors or Masters in Computer Science / Computer Engineering or the equivalent

  • Strong FPGA design experience, minimum 3 years working with FPGA Development

  • Experience on timing closure design

  • Good understanding of the FPGA design cycle

  • Experience on SystemVerilog/Verilog programming

  • Strong experience on FPGA development tools (Altera or Xilinx) and simulation tools (Modelsim, ...)

  • Demonstrated experience on Hardware-software codesign and High Level Synthesis

  • Good knowledge on network protocols, specially Ethernet, ARP, IP, TCP and UDP

  • Good C/C++ knowledge

  • Familiarity with scripting languages like bash scripts, TCL, Python, Perl

  • Good knowledge of technical architecture design, including tools and components, to reasonably argue for and against all components in that architecture


Salary range: Nego

  • 13th-month salary & performance review

  • Governmental insurances based on labor law (after probation)

  • 100% of salary in the probation time (Included Personal income tax)

  • 15 days of annual leave, Childcare leave, Marriage Leave

  • Maternity/Paternity leave: based on Labour law

  • Team building activities, happy-hour, etc.