ELR971 - DESIGN VERIFICATION ENGINEER (SOUND INTERFACE)
ELR971 - DESIGN VERIFICATION ENGINEER (SOUND INTERFACE)
Manufacturing
Middle/Senior
Ho Chi Minh City
Full-time
Responsibilities
Manage Sound IP team with 4 members
Control the quality of team's deliverable/output
Communicate with vendor for purchasing IPs about required specification
Consideration of IP creation parameters
Make DRBFM, target specification, and implementation specification.
Generate/coding full or a part of IP.
Perform UT, CT and palladium verification.
Perform synthesis and checkers (HLDRC, DFTcheck, STAcheck).
Perform test point insertion, Meta-FF and TMR.
Release module SDC and perform STA timing check.
Requirements
At least 5 years of experience in a related role.
Knowledge of Sound system.
Experience of spec study.
Experience in logic design and verification using Verilog HDL.
Experience in logic synthesis, STA, SDC, DFT, and ECO.
Experience working as at least 2 companies purchase, IP benchmarks.
Good English communication skills.
Benefits
Working location: Probation in District 7, HCM then Remote Full-time
Salary range: Based on current salary
Infomation
Offered Salary
Negotiate
Skills